Dilithium; Lattice-based cryptography; memory optimization; microcontroller; RAM; random access memory; threshold signature; Constrained devices; Electronic services; Lattice-based; Memory optimization; Multi-signature; Optimisations; Quanta computers; Random access memory; Threshold signature; Human-Computer Interaction; Computer Networks and Communications; Computer Vision and Pattern Recognition; Software
Résumé :
[en] In the era of growing threats posed by the development of quantum computers, ensuring the security of electronic services has become fundamental. The ongoing standardization process led by the National Institute of Standards and Technology (NIST) emphasizes the necessity for quantum-resistant security measures. However, the implementation of Post-Quantum Cryptographic (PQC) schemes, including advanced schemes such as threshold signatures, faces challenges due to their large key sizes and high computational complexity, particularly on constrained devices. This paper introduces two microcontroller-tailored optimization approaches, focusing on enhancing the DS2 threshold signature scheme. These optimizations aim to reduce memory consumption while maintaining security strength, specifically enabling the implementation of DS2 on microcontrollers with only 192 KB of RAM. Experimental results and security analysis demonstrate the efficacy and practicality of our solution, facilitating the deployment of DS2 threshold signatures on resource-constrained microcontrollers.
Centre de recherche :
Interdisciplinary Centre for Security, Reliability and Trust (SnT) > APSIA - Applied Security and Information Assurance Brno University of Technology
Disciplines :
Sciences informatiques
Auteur, co-auteur :
Ricci, Sara ; Brno University of Technology, Brno, Czech Republic
Shapoval, Vladyslav ; Brno University of Technology, Brno, Czech Republic
Dzurenda, Petr ; Brno University of Technology, Brno, Czech Republic
ROENNE, Peter ; University of Luxembourg > Interdisciplinary Centre for Security, Reliability and Trust (SNT) > APSIA
OUPICKÝ, Jan ; University of Luxembourg > Interdisciplinary Centre for Security, Reliability and Trust (SNT) > APSIA
Malina, Lukas ; Brno University of Technology, Brno, Czech Republic
Co-auteurs externes :
yes
Langue du document :
Anglais
Titre :
Lattice-based Multisignature Optimization for RAM Constrained Devices
Date de publication/diffusion :
30 juillet 2024
Nom de la manifestation :
Proceedings of the 19th International Conference on Availability, Reliability and Security
Lieu de la manifestation :
Vienna, Autriche
Date de la manifestation :
from 30-07-2024 to 02-08-2024
Titre de l'ouvrage principal :
ARES 2024 - 19th International Conference on Availability, Reliability and Security, Proceedings
U-AGR-7127 - C21/IS/16221219/ImPAKT - RYAN Peter U-AGR-8026 - LuxTrust - RYAN Peter
Organisme subsidiant :
FNR - Luxembourg National Research Fund Ministry of the Interior of the Czech Republic
N° du Fonds :
U-AGR-8026; U-AGR-7127; VJ03030014
Subventionnement (détails) :
The following funding source is gratefully acknowledged: Ministry of the Interior of the Czech Republic under Grant VJ03030014. Jan Oupický was supported by the industrial partnership project between the interdisciplinary research center SnT and LuxTrust. Peter Roenne received support from the Luxembourg National Research Fund (FNR) under the CORE project (C21/IS/16221219/ImPAKT).
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