Verification of automotive networks - what to expect (and not expect) from each technique

Reference : Verification of automotive networks - what to expect (and not expect) from each technique


	Document type :	Scientific congresses, symposiums and conference proceedings : Unpublished conference
	Discipline(s) :	Engineering, computing & technology : Electrical & electronics engineering
	To cite this reference:	http://hdl.handle.net/10993/17624

Title :	Verification of automotive networks - what to expect (and not expect) from each technique
Language :	English
Author, co-author :	Navet, Nicolas [University of Luxembourg > Faculty of Science, Technology and Communication (FSTC) > Computer Science and Communications Research Unit (CSC) >]
Publication date :	9-Dec-2013
Peer reviewed :	No
On invitation :	Yes
Audience :	International
Event name :	Automotive Bus systems + Ethernet
Event date :	from 09-12-2013 to 11-12-2013
Event organizer :	IQPC
Event place (city) :	Stuttgart
Event country :	Germany
Keywords :	[en] automotive networks ; Controller Area Network ; Simulation ; Schedulability analysis
Abstract :	[en] The presentation focuses on the verification of wired automotive buses and addresses the following topics: historical perspective of verification techniques, review of the different sets of messages and verification techniques along the development cycle, performance metrics and end-to-end constraints, early stage verification technique: schedulability analysis versus simulation.
Target :	Researchers ; Professionals ; Students
Permalink :	http://hdl.handle.net/10993/17624

File(s) associated to this reference

Fulltext file(s):

	File	Commentary	Version	Size	Access
Open access	IQPC-2013-Navet_web.pdf		Author postprint	1.82 MB	View/Open

All documents in ORBi^lu are protected by a user license.