A Novel Multiplicative Phase Dithering Scheme for 1-bit Compressive Radar

Analog to digital converters; Cost-efficient; Dithering technique; High costs; High quality; Low-costs; Lower complexity; Quantisation; Quantization noise; Radar signals; Signal Processing; Electrical and Electronic Engineering

Abstract :

[en] In this paper, we tackle the issue of implementing a dithering procedure for the 1-bit quantization of radar signals that is able to generate high-quality estimates while remaining a low-complexity and cost-efficient solution. Classic Dithering techniques that add a signal before the Analog to Digital Converter (ADC) have been used in many acquisition chain designs and have been studied as a way to shape the quantization noise more favourably. Here, we stray away from this additive dithering, which, as will be made clear later, induces a complex and high-cost implementation. Instead, we propose the use of a multiplicative phase dithering. This process can leverage already existing radar architectures of Frequency Modulated Continuous Wave (FMCW) radars and can thus be efficiently implemented. The efficiency of this multiplicative dithering is first studied theoretically, and its link to another coarse quantization scheme, namely the Phase-Only acquisition, is highlighted. The performances of this novel dithering scheme are then extensively tested using Monte Carlo simulations and are thoroughly compared to their additive counterparts. A hardware-relaxed version of the random phase dithering is also introduced and compared to the other 1-bit schemes. The observations made in simulations are then validated using actual radar measurements at 24 GHz. Combined with the simulations, these measurements show that the multiplicative dithering is an appealing alternative to the additive random dithering in a low number of measurement setting. Specifically, we show that this procedure is a good trade-off between strong theoretical guarantees and reconstruction quality for low-complexity hardware.

Disciplines :

Electrical & electronics engineering

Author, co-author :

FEUILLEN, Thomas ; University of Luxembourg > Interdisciplinary Centre for Security, Reliability and Trust (SNT) > SPARC

Vandendorpe, Luc ; UCLouvain, ICTEAM, Louvain-la-Neuve, Belgium

Jacques, Laurent ; UCLouvain, ICTEAM, Louvain-la-Neuve, Belgium

External co-authors :

yes

Language :

English

Title :

A Novel Multiplicative Phase Dithering Scheme for 1-bit Compressive Radar

Publication date :

04 September 2025

Journal title :

IEEE Journal of Selected Topics in Signal Processing

ISSN :

1932-4553

eISSN :

1941-0484

Publisher :

Institute of Electrical and Electronics Engineers Inc.

Special issue title :

Special Issue on Low-Bit-Resolution Signal Processing: Algorithms, Implementations, and Applications

Volume :

Issue :

Pages :

1146-1158

Peer reviewed :

Peer Reviewed verified by ORBi

Additional URL :

http://xplorestaging.ieee.org/ielx8/4200690/11319267/11151101.pdf?arnumber=11151101

FnR Project :

U-AGR-7355 - C23/IS/18158802/SURF - FEUILLEN Thomas

Name of the research project :

U-AGR-7355 - C23/IS/18158802/SURF - FEUILLEN Thomas

Funders :

FNR CORE SURF Project

Available on ORBilu :

since 07 January 2026

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