Timing Analysis; Model-Based Design; Internet of Things
Disciplines :
Sciences informatiques
Auteur, co-auteur :
SUNDHARAM, Sakthivel Manikandan ; University of Luxembourg > Faculty of Science, Technology and Communication (FSTC) > Computer Science and Communications Research Unit (CSC)
Langue du document :
Anglais
Titre :
Short Term Scientific Mission Report on Applying Timing Analysis Metamodel to Co-Simulation Model Based Development Environment
Date de publication/diffusion :
21 octobre 2016
Maison d'édition :
ICT COST Action IC1202, European Cooperation In Science & Research
Focus Area :
Computational Sciences
Projet FnR :
FNR10053122 - Timing-aware Model-based Design With Application To Automotive Embedded Systems, 2015 (01/11/2015-30/09/2018) - Sakthivel Manikandan Sundharam
Intitulé du projet de recherche :
Timing Analysis on Code-Level (TACLe)
Organisme subsidiant :
ICT COST Action IC1202, European Cooperation In Science & Research