Reference : Timing verification of automotive communication architectures using quantile estimation
Scientific congresses, symposiums and conference proceedings : Unpublished conference
Engineering, computing & technology : Electrical & electronics engineering
Timing verification of automotive communication architectures using quantile estimation
Navet, Nicolas mailto [University of Luxembourg > Faculty of Science, Technology and Communication (FSTC) > Computer Science and Communications Research Unit (CSC) >]
Louvart, Shehnaz mailto [Renault SAS Technocentre]
Villanueva, Jose mailto [Renault SAS Technocentre]
Campoy-Martinez, Sergio mailto [Renault SAS Technocentre]
Migge, Jörn mailto [RealTime-at-Work (RTaW)]
Embedded Real-Time Software and Systems (ERTS 2014)
from 05-02-2014 to 07-02-2014
[en] Timing verification ; automotive networks ; Controller Area Network ; simulation ; statistics
[en] Early stage timing verification on CAN traditionally relies on simulation and schedulability analysis, also known as worst-case response time (WCRT) analysis. Despite recent progresses, the latter technique remains pessimistic espe cially in complex networking architectures with gateways and heterogeneous communication stacks. Indeed, there are practical cases where no exact WCRT analysis is available, and merely upper bounds on the response times can be derived, on the basis of which unnecessary conservative design choices may be made. Simulation, on the other hand, does not provide any guarantees per se and, in the context of critical networks, should only be used along with an adequate methodology. In this paper, we argue for the use of quantiles of the response time distribution as performance metrics providing an adjustable trade-off between safety and resource usage optimization. We discuss how the exact value of the quantile to consider should be chosen with regard to the criticality of the frames, and illustrate the approach on two typical automotive use -cases.
Researchers ; Professionals ; Students
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