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See detailINTERFACE OPEN-CIRCUIT VOLTAGE DEFICIT IN CU(IN,GA)S2 SOLAR CELL: CHARACTERIZATION, SIMULATION AND MITIGATION
Sood, Mohit UL

Doctoral thesis (2021)

Current commercial photovoltaic technologies are close to their practical limits, and enhancing their power conversion efficiency (PCE) requires a paradigm shift to tandem approaches. Tandem solar cells ... [more ▼]

Current commercial photovoltaic technologies are close to their practical limits, and enhancing their power conversion efficiency (PCE) requires a paradigm shift to tandem approaches. Tandem solar cells can exceed the single junction practical and thermodynamic limits. The desired top cell bandgap to enhance PCE of current photovoltaic technologies is ~1.6 1.7 eV. The bandgap tunability from 1.5 eV to 2.5 eV positions Cu(In,Ga)S2 as a prime top cell candidate for next generation low-cost tandem cells. However, they are limited by a low external open circuit voltage (VOC,ex). In this thesis, we have studied the interface recombination and found it to cause a difference between VOC,ex and internal open-circuit voltage (VOC,in) in Cu(In,Ga)S2 solar cell. We have introduced a quantifiable metric that has not been used before for Cu(In,Ga)S2, to evaluate VOC disparity in terms of “interface VOC deficit” defined as (VOC,in – VOC,ex). The temperature dependent current-voltage measurement allows to investigate the activation energy (Ea) of the dominating recombination path in the device, uncovering the cause of interface VOC deficit in Cu poor and Cu-rich Cu(In,Ga)S2 devices. We find that negative conduction band offset (CBO) at the absorber/buffer interface results in interface VOC deficit in Cu poor Cu(In,Ga)S2 devices. Although the interface VOC deficit can be reduced by replacing the buffer for favorable band alignment at the absorber/buffer interface, a substantial deficiency still exists. We observe that the CBO not only at the absorber/buffer interface but also at the buffer/i-layer interface leads to an interface VOC deficit in devices. This, in general, is not an issue in Cu(In,Ga)Se2 devices. By optimizing buffer and i-layer, we mitigate and overcome buffer/i-layer losses to get Cu poor Cu(In,Ga)S2 devices with consistently low interface VOC deficit. As a result, an in-house PCE of 15.1 % is achieved together with an externally certified PCE of 14 %. This is, by far, the best Cu(In,Ga)S2 device performance except for the record PCE device. In contrast, the interface VOC deficit and the interface recombination persists in Cu-rich Cu(In,Ga)S2 devices and is not resolved by alternative buffers. To identify the possible origin of the interface VOC deficit, we characterize two sister systems CuInS2 and CuInSe2, which offer reduced complexity due to Ga exclusion. The Cu-rich devices of these systems are also known to suffer from interface recombination, and for CuInSe2, it has been linked to the “200 meV” defect. However, the underlying mechanism of how this defect leads to interface recombination remains unknown. Through results obtained from photoelectron spectroscopic measurements, we exclude the possibility of two commonly evoked causes of interface recombination: negative CBO and Fermi-level pinning. Sulfur-based post-deposition treatments on KCN etched Cu-rich CuInS2 absorbers reveal near interface defects as a possible alternative cause of interface VOC deficit. The treatment increases the VOC,ex, which originates from improved Ea and interface VOC deficit in treated devices. The capacitance transient measurements further reveal that slow metastable defects are present in the untreated sample. The treated samples show that the slow transient is suppressed, suggesting the passivation of slow metastable defects. The treatment adapted to Cu rich CuInSe2 displays a reduction in the deep defect signature in admittance spectra, which explains the observed improvement in interface VOC deficit. This indicates that the defects near the absorber/buffer interface, acting as non-radiative recombination centers, as the source of interface VOC deficit. Finally, to understand how the defect leads to interface recombination, a new model based on near interface defects is offered using the holistic analysis and evaluation of the defect characteristics. We can reproduce an interface VOC deficit with all the signatures of an interface recombination-dominated device using numerical simulations. This model provides a solution for the consideration of interface recombination by defects distributed in a thin layer within the bulk absorber, an explanation beyond classical models. The near interface defect model finally explains why Cu rich chalcopyrite solar cells are limited in their VOC,ex despite a good VOC,in, which was not discovered before. The model thus forms a new third explanation for interface recombination signature in devices and is applicable to any device with highly recombinative defects near the interface. [less ▲]

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See detailNear surface defects: Cause of deficit between internal and external open-circuit voltage in solar cells
Sood, Mohit UL

in Progress in Photovoltaics (2021)

Interface recombination in a complex multilayered thin-film solar structure causes a disparity between the internal open-circuit voltage (VOC,in), measured by photoluminescence, and the external open ... [more ▼]

Interface recombination in a complex multilayered thin-film solar structure causes a disparity between the internal open-circuit voltage (VOC,in), measured by photoluminescence, and the external open-circuit voltage (VOC,ex), that is, a VOC deficit. Aspirations to reach higher VOC,ex values require a comprehensive knowledge of the connection between VOC deficit and interface recombination. Here, a near-surface defect model is developed for copper indium di-selenide solar cells grown under Cu-excess conditions. These cell show the typical signatures of interface recombination: a strong disparity between VOC,in and VOC,ex, and extrapolation of the temperature dependent q·VOC,ex to a value below the bandgap energy. Yet, these cells do not suffer from reduced interface bandgap or from Fermi-level pinning. The model presented is based on experimental analysis of admittance and deep-level transient spectroscopy, which show the signature of an acceptor defect. Numerical simulations using the near-surface defects model show the signatures of interface recombination without the need for a reduced interface bandgap or Fermi-level pinning. These findings demonstrate that the VOC,in measurements alone can be inconclusive and might conceal the information on interface recombination pathways, establishing the need for complementary techniques like temperature dependent current–voltage measurements to identify the cause of interface recombination in the devices. [less ▲]

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See detailWaste- and Cd-Free Inkjet-Printed Zn(O,S) Buffer for Cu(In,Ga)(S,Se)2 Thin-Film Solar Cells
Chu, van Ben UL; Siopa, Daniel UL; Debot, Alice UL et al

in ACS Applied Materials and Interfaces (2021), 13

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See detailAbsorber composition: A critical parameter for the effectiveness of heat treatments in chalcopyrite solar cells
Sood, Mohit UL; Elanzeery, Hossam UL; Adeleye, Damilola UL et al

in Progress in Photovoltaics (2020)

Post-device heat treatment (HT) in chalcopyrite [Cu(In,Ga)(S,Se)2] solar cells is known to improve the performance of the devices. However, this HT is only beneficial for devices made with absorbers grown ... [more ▼]

Post-device heat treatment (HT) in chalcopyrite [Cu(In,Ga)(S,Se)2] solar cells is known to improve the performance of the devices. However, this HT is only beneficial for devices made with absorbers grown under Cu-poor conditions but not under Cu excess.. We present a systematic study to understand the effects of HT on CuInSe2 and CuInS2 solar cells. The study is performed for CuInSe2 solar cells grown under Cu-rich and Cu-poor chemical potential prepared with both CdS and Zn(O,S) buffer layers. In addition, we also study Cu-rich CuInS2 solar cells prepared with the suitable Zn(O,S) buffer layer. For Cu-poor selenide device low-temperature HT leads to passivation of bulk, whereas in Cu-rich devices no such passivation was observed. The Cu-rich devices are hampered by a large shunt. The HT decreases shunt resistance in Cu-rich selenides, whereas it increases shunt resistance in Cu-rich sulfides.. The origin of these changes in device performance was investigated with capacitance-voltage measurement which shows the considerable decrease in carrier concentration with HT in Cu-poor CuInSe2, and temperature dependent current-voltage measurements show the presence of barrier for minority carriers. Together with numerical simulations, these findings support a highly-doped interfacial p+ layer device model in Cu-rich selenide absorbers and explain the discrepancy between Cu-poor and Curich device performance. Our findings provide insights into how the same treatment can have a completely different effect on the device depending on the composition of the absorber. [less ▲]

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See detailPhonon coupling and shallow defects in CuInS2
Lomuscio, Alberto UL; Sood, Mohit UL; Melchiorre, Michele UL et al

in Physical Review. B (2020), 101(8), 085119-

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See detailChemical instability at chalcogenide surfaces impacts chalcopyrite devices well beyond the surface
Colombara, Diego UL; Elanzeery, Hossam UL; Nicoara, Nicoleta et al

in Nature Communications (2020)

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See detailChallenge in Cu-rich CuInSe2 thin film solar cells: Defect caused by etching
Elanzeery, Hossam UL; Melchiorre, Michele UL; Sood, Mohit UL et al

in Physical Review Materials (2019), 3

Detailed reference viewed: 178 (13 UL)