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Peer Reviewed
See detailTowards Computer-Aided, Iterative TSN-and Ethernet-based E/E Architecture Design
Creighton, Oliver; Navet, Nicolas UL; Keller, Patrick UL et al

Scientific Conference (2020, September 16)

In this presentation we would like to propose a novel approach towards studying and simulating candidate designs of next generation Ethernet architectures at established OEMs that intend to employ 100BASE ... [more ▼]

In this presentation we would like to propose a novel approach towards studying and simulating candidate designs of next generation Ethernet architectures at established OEMs that intend to employ 100BASE-T1, 1000BASE-T1 and, for increased flexibility and lower cost, 10BASE-T1S. Typical design goals of next generation architectures are future extensibility and cost optimization of the lowest-end. We propose to introduce guidance to an otherwise standard Monte-Carlo simulation by providing certain fixed points (e.g., mandated connections of ECUs to certain bridges, complete re-use of ECUs) and “hot spots” in the topology (e.g., ECUs with the highest variability pressure) that are known in advance from BMW’s experience with their vehicles in the field. Several important practical considerations must be integrated in the generation of candidate architectures: - Topological constraints: ECU proximity to sensors, daisy chain connections between ECUs to minimize cable length, number of switch ports in a certain ECU, etc. - Security and reliability requirements: segregation between mixed-criticality streams, proxy ECUs, and redundant paths. Our position statement explores the ability of algorithmic tools to synthesize Ethernet-based architectures based on a minimal fixed core TSN topology, design goals, design constraints, assumptions about next generation applications and data from past projects (capturing part of the OEM domain knowledge). [less ▲]

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