References of "Keller, Patrick 50029114"
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See detailApproximating WCRT through the aggregation of short simulations with different initial conditions: application to TSN
Keller, Patrick UL; Navet, Nicolas UL

in 30th International Conference on Real-Time Networks and Systems (RTNS ’22) (2022, June)

Assessing traversal times is the main concern in the verification of embedded real-time networks. Schedulability analysis, as it provides firm guarantees, is the preferred technique for the designers of ... [more ▼]

Assessing traversal times is the main concern in the verification of embedded real-time networks. Schedulability analysis, as it provides firm guarantees, is the preferred technique for the designers of critical systems. There are however contexts where it is not economically or technically feasible to develop one, typically when the software and hardware components have not been designed with predictability in mind, e.g. as soon as TCP-based traffic is involved in network communication or when the hardware platform is too complex (e.g. heterogeneous System-on-Chips). In this paper, we study if it is possible to improve the ability of simulation to observe large traversal times, by running many short simulations with appropriately chosen simulation time and varying initial offsets of the stations on the network. The de-facto standard approach to assess maximal traversal times is to run a single long simulation with synchronized node start offsets and to use randomized node clock drifts inside an acceptable range. This approach is known to yield high traversal times but is not parallelizable. We propose an alternative approach consisting in splitting the simulation time over multiple shorter simulations with, optionally, randomized node start offsets. We evaluate the optimization potential of this simple approach on several realistic network configurations by comparing long simulations to aggregated short simulations, with and without synchronized node start offsets. We observe, considering all flows, that this allows a median improvement of up to 21.3% in terms of maximum traversal time observed, for the same simulation time budget. Additional randomization of the node start offsets showed further improvements of up to 4.8% in our experiments. Results from this line of work can be used to estimate the pessimism of schedulability analyses and verify systems for which no analysis is available. [less ▲]

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See detailWhat You See is What it Means! Semantic Representation Learning of Code based on Visualization
Keller, Patrick UL; Kabore, Abdoul Kader UL; Plein, Laura et al

in ACM Transactions on Software Engineering and Methodology (2021)

Recent successes in training word embeddings for NLP tasks have encouraged a wave of research on representation learning for sourcecode, which builds on similar NLP methods. The overall objective is then ... [more ▼]

Recent successes in training word embeddings for NLP tasks have encouraged a wave of research on representation learning for sourcecode, which builds on similar NLP methods. The overall objective is then to produce code embeddings that capture the maximumof program semantics. State-of-the-art approaches invariably rely on a syntactic representation (i.e., raw lexical tokens, abstractsyntax trees, or intermediate representation tokens) to generate embeddings, which are criticized in the literature as non-robustor non-generalizable. In this work, we investigate a novel embedding approach based on the intuition that source code has visualpatterns of semantics. We further use these patterns to address the outstanding challenge of identifying semantic code clones. Wepropose theWySiWiM(“What You See Is What It Means”) approach where visual representations of source code are fed into powerfulpre-trained image classification neural networks from the field of computer vision to benefit from the practical advantages of transferlearning. We evaluate the proposed embedding approach on the task of vulnerable code prediction in source code and on two variationsof the task of semantic code clone identification: code clone detection (a binary classification problem), and code classification (amulti-classification problem). We show with experiments on the BigCloneBench (Java), Open Judge (C) that although simple, ourWySiWiMapproach performs as effectively as state of the art approaches such as ASTNN or TBCNN. We also showed with datafrom NVD and SARD thatWySiWiMrepresentation can be used to learn a vulnerable code detector with reasonable performance(accuracy∼90%). We further explore the influence of different steps in our approach, such as the choice of visual representations or theclassification algorithm, to eventually discuss the promises and limitations of this research direction. [less ▲]

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See detailTowards Computer-Aided, Iterative TSN-and Ethernet-based E/E Architecture Design
Creighton, Oliver; Navet, Nicolas UL; Keller, Patrick UL et al

Scientific Conference (2020, September 16)

In this presentation we would like to propose a novel approach towards studying and simulating candidate designs of next generation Ethernet architectures at established OEMs that intend to employ 100BASE ... [more ▼]

In this presentation we would like to propose a novel approach towards studying and simulating candidate designs of next generation Ethernet architectures at established OEMs that intend to employ 100BASE-T1, 1000BASE-T1 and, for increased flexibility and lower cost, 10BASE-T1S. Typical design goals of next generation architectures are future extensibility and cost optimization of the lowest-end. We propose to introduce guidance to an otherwise standard Monte-Carlo simulation by providing certain fixed points (e.g., mandated connections of ECUs to certain bridges, complete re-use of ECUs) and “hot spots” in the topology (e.g., ECUs with the highest variability pressure) that are known in advance from BMW’s experience with their vehicles in the field. Several important practical considerations must be integrated in the generation of candidate architectures: - Topological constraints: ECU proximity to sensors, daisy chain connections between ECUs to minimize cable length, number of switch ports in a certain ECU, etc. - Security and reliability requirements: segregation between mixed-criticality streams, proxy ECUs, and redundant paths. Our position statement explores the ability of algorithmic tools to synthesize Ethernet-based architectures based on a minimal fixed core TSN topology, design goals, design constraints, assumptions about next generation applications and data from past projects (capturing part of the OEM domain knowledge). [less ▲]

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