References of "Marso, Michel 50002313"
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See detailPhotoionization spectroscopy of traps in AlGaN/GaN HEMTs
Wolter, M.; Javorka, P.; Marso, Michel UL et al

in Journal of Electronic Materials (2002), 31(12), 1321-1324

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See detailLow-temperature-grown MBE GaAs for terahertz photomixers
Mikulics, M.; Marso, Michel UL; Fox, A. et al

in EDMO (2001)

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See detailOptimization of AlGaN/GaN HEMT performance
Javorka, P.; Wolter, M.; Alam, A. et al

in Proc. EDMO (2001)

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See detailInvestigation of self-heating effects in AlGaN/GaN HEMTs
Kuzmík, J.; Javorka, P.; Alam, A. et al

in Proc. EDMO (2001)

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See detailVertical Double-Gate MOSFET Based on Epitaxial Growth
Moers, J.; Trellenkamp, St; Vescan, L. et al

in Proceedings of the 31st European Solid State Devices Research Conference, Nürnberg, Germany (2001)

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See detailVaractor Diodes based on an AlGaN/GaN HEMT layer structure
Marso, Michel UL; Wolter, M.; Bernát, J. et al

in EProc. EDMO (2001)

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See detailAlGaN/GaN HEMT Optimization Using the RoundHEMT Technology
Marso, Michel UL; Javorka, P.; Alam, A. et al

in Physica Status Solidi A. Applied Research (2001), 188

The electrical characterization of epitaxially grown HEMT layer systems for device fabrication is commonly performed by Hall measurements. However, the ultimate characterization of a HEMT layer system is ... [more ▼]

The electrical characterization of epitaxially grown HEMT layer systems for device fabrication is commonly performed by Hall measurements. However, the ultimate characterization of a HEMT layer system is the transistor device itself. The RoundHEMT concept meets the need for a device technology with few fabrication steps that allows a fast feedback to epitaxy while providing an evaluation of important electrical and also processing data. Even though nearly identical Hall data on structures with different thickness and doping concentration of the AlGaN layers suggest similar device properties, the RoundHEMTs resolve remarkable differences in device performance. The best layer structure was used to fabricate HEMTs with IDS = 700 mA/mm, fT = 35 GHz, and fmax = 70 GHz for LG = 0.2 mm. [less ▲]

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See detailAlGaN/GaN Round-HEMTs on (111) silicon substrates
Javorka, P.; Alam, A.; Nastase, N. et al

in Electronics Letters (2001), 37(2001), 1364-1366

AlGaN/GaN Round-HEMTs on silicon substrates have been realised and their static characteristics investigated. The AlGaN/GaN (x = 0.23) material structures were grown on (111) p-Si by LP-MOVPE. Devices ... [more ▼]

AlGaN/GaN Round-HEMTs on silicon substrates have been realised and their static characteristics investigated. The AlGaN/GaN (x = 0.23) material structures were grown on (111) p-Si by LP-MOVPE. Devices with 0.3 mm gate length exhibit a saturation current of 0.82 A/mm, a good pinch-off and a peak extrinsic transconductance of 110 mS/mm. Highest saturation current reported so far and static output characteristics up to 20 V demonstrate that the devices are capable of handling 16 W/mm of static heat dissipation without any degradation of their performance. [less ▲]

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See detailAlGaN/GaN Varactor Diode for Integration in HEMT Circuits
Marso, Michel UL; Wolter, M.; Javorka, P. et al

in Electronics Letters (2001), 37(2001), 1476-1478

Fabrication and characterisation of metal-semiconductor-metal (MSM) diodes above an AlGaN/GaN HEMT layer system for varactor applications are reported. Device fabrication uses standard HEMT processing ... [more ▼]

Fabrication and characterisation of metal-semiconductor-metal (MSM) diodes above an AlGaN/GaN HEMT layer system for varactor applications are reported. Device fabrication uses standard HEMT processing steps, allowing integration in HEMT circuits without the need of sophisticated growth or etching techniques. Capacitancevoltage measurements exhibit CMAX/CMIN ratios up to 100, tunable by the electrode geometry. These results exceed best values for published heterostructure varactor diodes. Fabrication of AlGaN/GaN HEMTs on the same layer system with identical technology prove the potential for monolithic integration. [less ▲]

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See detailFabrication of Laterally Displaced Porous Silicon Filters
Marso, Michel UL; Wolter, M.; Arens-Fischer, R. et al

in Thin Solid Films (2001), 382(2001), 218-221

Porous silicon superlattices have been used to manufacture laterally displaced dielectric filters with different optical properties on one substrate. Two different fabrication processes for two-colour ... [more ▼]

Porous silicon superlattices have been used to manufacture laterally displaced dielectric filters with different optical properties on one substrate. Two different fabrication processes for two-colour microfilter arrays are presented. Both methods overcome the problem of non-uniform optical properties of the well-known procedure where two filter stacks are grown one upon another, with subsequent partial removal of the upper filter by reactive ion etching. The novel methods give uniform optical properties of the two filter areas, profiting from the main property of the formation process of porous silicon: the formation of porous silicon occurs only at the porous silicon substrate interface. [less ▲]

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See detailInvestigations on the influence of traps in AlGaN/GaN HEMTs
Wolter, M.; Javorka, P.; Marso, Michel UL et al

in EDMO (2001)

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See detailElectrical Control of the Reflectance of Porous Silicon Layers
Thönissen, M.; Marso, Michel UL; Arens-Fischer, R. et al

in Journal of Porous Materials (2000), 7((1/2/3),), 205-208

In this paper we demonstrate the filling of porous silicon (PS) layers with liquid crystals (LC’s) in order to control the reflectance electrically. The preparation of PS and the choice of the right group ... [more ▼]

In this paper we demonstrate the filling of porous silicon (PS) layers with liquid crystals (LC’s) in order to control the reflectance electrically. The preparation of PS and the choice of the right group of LC’s will be presented. Especially an oxidation of PS is necessary so that the methods and parameters of oxidation will also be discussed. As a first result the increasing and decreasing of the thickness oscillations in the reflectance as a function of the applied voltage can be observed. [less ▲]

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See detailVertical Silicon MOSFETs based on Selective Epitaxial Growth
Moers, J.; Tönnesmann, A.; Klaes, D. et al

in Proc. 3rd International EuroConference on Advanced Semiconductor Devices and Microsystems (2000)

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See detailMaterial and Device Issues of GaN-based HEMTs
Kordoš, P.; Alam, A.; Betko, J. et al

in Proceedings of the 8th International Symposium on High Performance Electron Devices for Microwave and Optoelectronic Applications (EDMO), (2000)

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See detailA Novel InAlAs/InGaAs Layer Structure for Monolithically Integrated Photoreceiver,
Hodel, U.; Orzati, A.; Marso, Michel UL et al

in Proc. 2000 Int. Conf. Indium Phosphide and Related Materials (2000)

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See detailFormation of Porous Silicon Filter Structures with Different Properties on Small Areas
Arens-Fischer, R.; Krüger, M.; Thönissen, M. et al

in Journal of Porous Materials (2000), 7 (1/2/3)

Porous silicon (PS) layer systems have a broad range of possible applications. An advantage is the good control of the refractive index and the etch rate of the layers by the applied current density and ... [more ▼]

Porous silicon (PS) layer systems have a broad range of possible applications. An advantage is the good control of the refractive index and the etch rate of the layers by the applied current density and the time respectively. For micro-optical devices you need patterned PS. For some optical devices it is not sufficient to have only one filter but it is necessary to form filters with different properties on a small area. We applied a method (M. Frank, U.B. Schallenberg, N. Kaiser, and W. Buß, in Conference on Miniaturized Systems with Microoptics and Micromechanics, edited by M.E. Moamedi, L.J. Hornbeck, and K.S.J. Pister (SPIE, San Jose, 1997), SPIE Proceedings Series 3008, p. 265) to PS which fits this goal by the following steps: fabrication of the desired reflectors below each other and partial removal of upper reflectors with reactive ion etching (RIE). The technological aspects of patterning PS after the fabrication are an important topic of this work. Problems are discussed in detail and solutions are given. [less ▲]

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See detailFormation of laterally displaced porous silicon filters using different fabrication methods
Marso, Michel UL; Wolter, M.; Arens-Fischer, R. et al

in Proceedings of the 3rd International EuroConference on Advanced Semiconductor Devices and Microsystems (2000)

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See detailIntegrated photometer with porous silicon interference filters
Hunkel, D.; Marso, Michel UL; Butz, R. et al

in Materials Science & Engineering : A (2000), B69-70((2000)), 100-103

Porous silicon transmission interference filters with laterally varying transmission wavelengths are used to manufacture a photometer. Because of the linear varying transmission characteristic of the ... [more ▼]

Porous silicon transmission interference filters with laterally varying transmission wavelengths are used to manufacture a photometer. Because of the linear varying transmission characteristic of the filter it is possible to measure, beyond small regions of the porous layer, the correlated spectral photo current. It is therefore necessary to bring up a series of ohmic metal contacts along the porous filter. Between two neighbouring contacts one can measure the spectral photo current of the transmission wavelength at this specific point of the surface. By measuring multiple pairs of contacts, the whole spectrum between 400 and 1100 nm wavelength can be recorded. First results of the resolution capability and sensitivity are demonstrated. [less ▲]

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See detailVertical p-MOSFETs with gate oxide deposition before selective epitaxial growth
Moers, J.; Klaes, D.; Tönnesmann, A. et al

in Solid-State Electronics (1999), 43(1999), 529-535

A novel vertical MOSFET concept using selective epitaxial growth by low pressure chemical vapor deposition is proposed and the ®rst p-channel device characteristics measured are described. In contrast to ... [more ▼]

A novel vertical MOSFET concept using selective epitaxial growth by low pressure chemical vapor deposition is proposed and the ®rst p-channel device characteristics measured are described. In contrast to other MOS technologies, the gate oxide is deposited before epitaxy, and therefore it exists before the channel region is grown. Compared to planar layouts, the vertical layout increases the packing density without the use of advanced lithography; the extent of the increase depends on application. Compared to other vertical transistors, this concept reduces overlap capacitance and o ers the possibility of three-dimensional integration. Vertical p channel MOSFETs with a channel length LG down to 130 nm and a gate oxide thickness dox down to 12 nm have been fabricated and yield a transconductance of 100 mS mm-1. [less ▲]

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See detail19 GHz vertical Si p-channel MOSFET
Moers, J.; Klaes, D.; Tönnesmann, A. et al

in Electronics Letters (1999), 35(1999), 239-240

Vertical Si p-MOSFETs with channel lengths of 100nm were fabricated using selective low pressure chemical vapour deposition (LPCVD) epitaxial growth and conventional i-line lithography. The layout, called ... [more ▼]

Vertical Si p-MOSFETs with channel lengths of 100nm were fabricated using selective low pressure chemical vapour deposition (LPCVD) epitaxial growth and conventional i-line lithography. The layout, called VOXFET, reduces gate to source/drain overlap capacitances, thus improving high speed applications. Transistors with a gate width of 12 um and gate oxide thickness of 10nm show transconductances gM of 200mS/mm and measured cutoff frequencies of fT = 8.7GHz and fMAX = 19.2 GHz. [less ▲]

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