Investigation of AlGaN/GaN HEMTs on Si substrate using backgating

in Physica Status Solidi C. Current Topics in Solid State Physics (2002), (1), 65-68

The influence of a substrate voltage on the dc characteristics of an AlGaN/GaN HEMT on silicon (111) substrate is investigated. This effect, known as backgating, is used to study traps that are located ... [more ▼]

The influence of a substrate voltage on the dc characteristics of an AlGaN/GaN HEMT on silicon (111) substrate is investigated. This effect, known as backgating, is used to study traps that are located between substrate and 2DEG channel. The transient of the drain current after applying a negative substrate voltage is evaluated for measurements with and without illumination. Several trap contributions are resolved by measurements at different photon energies. A photocurrent is observed up to 600 nm wavelength. Up to this wavelength the backgating effect can be compensated and the drain current restored by a short light pulse. The experiments are performed on completed HEMTs, allowing investigation of the influence of device fabrication technology. [less ▲]

AlGaN/GaN Round-HEMTs on (111) silicon substrates

in Electronics Letters (2001), 37(2001), 1364-1366

AlGaN/GaN Round-HEMTs on silicon substrates have been realised and their static characteristics investigated. The AlGaN/GaN (x = 0.23) material structures were grown on (111) p-Si by LP-MOVPE. Devices ... [more ▼]

AlGaN/GaN Round-HEMTs on silicon substrates have been realised and their static characteristics investigated. The AlGaN/GaN (x = 0.23) material structures were grown on (111) p-Si by LP-MOVPE. Devices with 0.3 mm gate length exhibit a saturation current of 0.82 A/mm, a good pinch-off and a peak extrinsic transconductance of 110 mS/mm. Highest saturation current reported so far and static output characteristics up to 20 V demonstrate that the devices are capable of handling 16 W/mm of static heat dissipation without any degradation of their performance. [less ▲]

Investigations on the influence of traps in AlGaN/GaN HEMTs

in EDMO (2001)

Integrated photometer with porous silicon interference filters

in Materials Science and Engineering: A: Structural Materials: Properties, Microstructures and Processing (2000), B69-70((2000)), 100-103

Porous silicon transmission interference filters with laterally varying transmission wavelengths are used to manufacture a photometer. Because of the linear varying transmission characteristic of the ... [more ▼]

Porous silicon transmission interference filters with laterally varying transmission wavelengths are used to manufacture a photometer. Because of the linear varying transmission characteristic of the filter it is possible to measure, beyond small regions of the porous layer, the correlated spectral photo current. It is therefore necessary to bring up a series of ohmic metal contacts along the porous filter. Between two neighbouring contacts one can measure the spectral photo current of the transmission wavelength at this specific point of the surface. By measuring multiple pairs of contacts, the whole spectrum between 400 and 1100 nm wavelength can be recorded. First results of the resolution capability and sensitivity are demonstrated. [less ▲]

Electrical Control of the Reflectance of Porous Silicon Layers

in Journal of Porous Materials (2000), 7((1/2/3),), 205-208

In this paper we demonstrate the filling of porous silicon (PS) layers with liquid crystals (LC’s) in order to control the reflectance electrically. The preparation of PS and the choice of the right group ... [more ▼]

In this paper we demonstrate the filling of porous silicon (PS) layers with liquid crystals (LC’s) in order to control the reflectance electrically. The preparation of PS and the choice of the right group of LC’s will be presented. Especially an oxidation of PS is necessary so that the methods and parameters of oxidation will also be discussed. As a first result the increasing and decreasing of the thickness oscillations in the reflectance as a function of the applied voltage can be observed. [less ▲]

Formation of Porous Silicon Filter Structures with Different Properties on Small Areas

in Journal of Porous Materials (2000), 7 (1/2/3)

Porous silicon (PS) layer systems have a broad range of possible applications. An advantage is the good control of the refractive index and the etch rate of the layers by the applied current density and ... [more ▼]

Porous silicon (PS) layer systems have a broad range of possible applications. An advantage is the good control of the refractive index and the etch rate of the layers by the applied current density and the time respectively. For micro-optical devices you need patterned PS. For some optical devices it is not sufficient to have only one filter but it is necessary to form filters with different properties on a small area. We applied a method (M. Frank, U.B. Schallenberg, N. Kaiser, and W. Buß, in Conference on Miniaturized Systems with Microoptics and Micromechanics, edited by M.E. Moamedi, L.J. Hornbeck, and K.S.J. Pister (SPIE, San Jose, 1997), SPIE Proceedings Series 3008, p. 265) to PS which fits this goal by the following steps: fabrication of the desired reflectors below each other and partial removal of upper reflectors with reactive ion etching (RIE). The technological aspects of patterning PS after the fabrication are an important topic of this work. Problems are discussed in detail and solutions are given. [less ▲]

Coupling of insect antennae to field-effect transistors for biochemical sensing

in Electrochimica Acta (1999), 44(1999), 3821-3826

A bioelectronic interface based on the coupling of an intact insect antenna to a field-e effct transistor (FET) has been realised in a whole-beetle BioFET (Biologically sensitive FET) and an isolated ... [more ▼]

A bioelectronic interface based on the coupling of an intact insect antenna to a field-e effct transistor (FET) has been realised in a whole-beetle BioFET (Biologically sensitive FET) and an isolated-antenna BioFET configuration. The intrinsic BioFET characteristics, such as current-voltage curves, transconductance and signal-to-noise ratio clearly depend on the chip layout. Therefore, the experiments were performed with three di erent gate geometries: linear shape (5 um x 100 um), U shape (5 um x 1000 um) and meander shape (10 um x 6000 um). The BioFET allows the determination of the `green-leaf odour' Z-3-hexen-l-ol down to the low ppb concentration range. Thus, the detection of plant damages is possible with this novel kind of biosensor. [less ▲]

Vertical p-MOSFETs with gate oxide deposition before selective epitaxial growth

in Solid-State Electronics (1999), 43(1999), 529-535

A novel vertical MOSFET concept using selective epitaxial growth by low pressure chemical vapor deposition is proposed and the ®rst p-channel device characteristics measured are described. In contrast to ... [more ▼]

A novel vertical MOSFET concept using selective epitaxial growth by low pressure chemical vapor deposition is proposed and the ®rst p-channel device characteristics measured are described. In contrast to other MOS technologies, the gate oxide is deposited before epitaxy, and therefore it exists before the channel region is grown. Compared to planar layouts, the vertical layout increases the packing density without the use of advanced lithography; the extent of the increase depends on application. Compared to other vertical transistors, this concept reduces overlap capacitance and o ers the possibility of three-dimensional integration. Vertical p channel MOSFETs with a channel length LG down to 130 nm and a gate oxide thickness dox down to 12 nm have been fabricated and yield a transconductance of 100 mS mm-1. [less ▲]

Selectively Grown Vertical Si p-MOS Transistor with Reduced Overlap Capacitances

in Proceedings of the 28th European Solid State Devices Research Conference, Bordeaux, France (1998)

Selectively Grown Vertical Si MOS Transistor with Reduced Overlap Capacitances

in Thin Solid Films (1998), 336(1998), 306-308

Vertical p-MOS transistors with channel length of 130 nm have been fabricated using selective epitaxial growth (SEG) to define the channel region. The vertical layout offers the advantages of achieving ... [more ▼]

Vertical p-MOS transistors with channel length of 130 nm have been fabricated using selective epitaxial growth (SEG) to define the channel region. The vertical layout offers the advantages of achieving short channel lengths and high integration densities while still using optical lithography to define lateral dimensions. Compared to other vertical concepts, this layout has reduced gate to source/drain overlap capacitances which is necessary for high speed applications. The use of SEG instead of blanket epitaxy avoids the deterioration of the Si/SiO2 interface due to reactive ion etching (RIE) and reduces punch-through due to facet growth. First non-optimized p-channel MOSFETs with a 12-nm gate oxide show a transconductance of 90 mS/mm. The cut-off frequencies of this device turned out to be f T = 2.3 GHz and f max = 1.1 GHz. [less ▲]