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See detailGrowth and characterisation of AlGaN/GaN-HEMTs on silicon substrates,
Kalisch, H.; Dikme, Y.; Gerstenbrandt, G. et al

in Physica Status Solidi A. Applications and Materials Science (2002), 194(2), 464-467

In order to analyse and to compare the properties of AlGaN/GaN HEMT on silicon and on sapphire substrates, studies on both layers and device types have been performed. Besides the substantially lower ... [more ▼]

In order to analyse and to compare the properties of AlGaN/GaN HEMT on silicon and on sapphire substrates, studies on both layers and device types have been performed. Besides the substantially lower substrate costs compared to SiC, the use of silicon as substrate provides the advantage of a higher thermal conductivity compared to sapphire allowing a more efficient heat removal from the device and thus higher RF power densities. On silicon, up to 900 nm of GaN as well as HEMT structures have been deposited and characterised regarding their structural, optical and electrical properties. HEMT devices with various gate lengths were processed and measured onwafer under continuous and pulsed operation conditions. The properties of the layers and devices on silicon substrates are developing to become comparable to those based on sapphire and silicon carbide. [less ▲]

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See detailAlGaN/GaN HEMTs on (111) Silicon Substrates
Javorka, P.; Alam, A.; Wolter, M. et al

in IEEE Electron Device Letters (2002), 23(2002), 4-6

AlGaN/GaN HEMTs on silicon substrates have been fabricated and their static and small-signal RF characteristics investigated. The AlGaN/GaN material structures were grown on (111) p-Si by LP-MOVPE ... [more ▼]

AlGaN/GaN HEMTs on silicon substrates have been fabricated and their static and small-signal RF characteristics investigated. The AlGaN/GaN material structures were grown on (111) p-Si by LP-MOVPE. Devices exhibit a saturation current of 0.91 A/mm, a good pinchoff and a peak extrinsic transconductance of 122 mS/mm. A unity current gain frequency of 12.5 GHz and fmax/fT=0.83 were obtained. The highest saturation current reported so far, static output characteristics of up to 20 V and breakdown voltage at pinchoff higher than 40 V demonstrate that the devices are capable of handling 16 W/mm static heat dissipation. [less ▲]

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See detailAlGaN/GaN HEMT Optimization Using the RoundHEMT Technology
Marso, Michel UL; Javorka, P.; Alam, A. et al

in Physica Status Solidi A. Applied Research (2001), 188

The electrical characterization of epitaxially grown HEMT layer systems for device fabrication is commonly performed by Hall measurements. However, the ultimate characterization of a HEMT layer system is ... [more ▼]

The electrical characterization of epitaxially grown HEMT layer systems for device fabrication is commonly performed by Hall measurements. However, the ultimate characterization of a HEMT layer system is the transistor device itself. The RoundHEMT concept meets the need for a device technology with few fabrication steps that allows a fast feedback to epitaxy while providing an evaluation of important electrical and also processing data. Even though nearly identical Hall data on structures with different thickness and doping concentration of the AlGaN layers suggest similar device properties, the RoundHEMTs resolve remarkable differences in device performance. The best layer structure was used to fabricate HEMTs with IDS = 700 mA/mm, fT = 35 GHz, and fmax = 70 GHz for LG = 0.2 mm. [less ▲]

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See detailFabrication of Laterally Displaced Porous Silicon Filters
Marso, Michel UL; Wolter, M.; Arens-Fischer, R. et al

in Thin Solid Films (2001), 382(2001), 218-221

Porous silicon superlattices have been used to manufacture laterally displaced dielectric filters with different optical properties on one substrate. Two different fabrication processes for two-colour ... [more ▼]

Porous silicon superlattices have been used to manufacture laterally displaced dielectric filters with different optical properties on one substrate. Two different fabrication processes for two-colour microfilter arrays are presented. Both methods overcome the problem of non-uniform optical properties of the well-known procedure where two filter stacks are grown one upon another, with subsequent partial removal of the upper filter by reactive ion etching. The novel methods give uniform optical properties of the two filter areas, profiting from the main property of the formation process of porous silicon: the formation of porous silicon occurs only at the porous silicon substrate interface. [less ▲]

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See detailAlGaN/GaN Round-HEMTs on (111) silicon substrates
Javorka, P.; Alam, A.; Nastase, N. et al

in Electronics Letters (2001), 37(2001), 1364-1366

AlGaN/GaN Round-HEMTs on silicon substrates have been realised and their static characteristics investigated. The AlGaN/GaN (x = 0.23) material structures were grown on (111) p-Si by LP-MOVPE. Devices ... [more ▼]

AlGaN/GaN Round-HEMTs on silicon substrates have been realised and their static characteristics investigated. The AlGaN/GaN (x = 0.23) material structures were grown on (111) p-Si by LP-MOVPE. Devices with 0.3 mm gate length exhibit a saturation current of 0.82 A/mm, a good pinch-off and a peak extrinsic transconductance of 110 mS/mm. Highest saturation current reported so far and static output characteristics up to 20 V demonstrate that the devices are capable of handling 16 W/mm of static heat dissipation without any degradation of their performance. [less ▲]

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See detailVertical Double-Gate MOSFET Based on Epitaxial Growth
Moers, J.; Trellenkamp, St; Vescan, L. et al

in Proceedings of the 31st European Solid State Devices Research Conference, Nürnberg, Germany (2001)

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See detailInvestigations on the influence of traps in AlGaN/GaN HEMTs
Wolter, M.; Javorka, P.; Marso, Michel UL et al

in EDMO (2001)

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See detailFormation of Porous Silicon Filter Structures with Different Properties on Small Areas
Arens-Fischer, R.; Krüger, M.; Thönissen, M. et al

in Journal of Porous Materials (2000), 7 (1/2/3)

Porous silicon (PS) layer systems have a broad range of possible applications. An advantage is the good control of the refractive index and the etch rate of the layers by the applied current density and ... [more ▼]

Porous silicon (PS) layer systems have a broad range of possible applications. An advantage is the good control of the refractive index and the etch rate of the layers by the applied current density and the time respectively. For micro-optical devices you need patterned PS. For some optical devices it is not sufficient to have only one filter but it is necessary to form filters with different properties on a small area. We applied a method (M. Frank, U.B. Schallenberg, N. Kaiser, and W. Buß, in Conference on Miniaturized Systems with Microoptics and Micromechanics, edited by M.E. Moamedi, L.J. Hornbeck, and K.S.J. Pister (SPIE, San Jose, 1997), SPIE Proceedings Series 3008, p. 265) to PS which fits this goal by the following steps: fabrication of the desired reflectors below each other and partial removal of upper reflectors with reactive ion etching (RIE). The technological aspects of patterning PS after the fabrication are an important topic of this work. Problems are discussed in detail and solutions are given. [less ▲]

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See detailElectrical Control of the Reflectance of Porous Silicon Layers
Thönissen, M.; Marso, Michel UL; Arens-Fischer, R. et al

in Journal of Porous Materials (2000), 7((1/2/3),), 205-208

In this paper we demonstrate the filling of porous silicon (PS) layers with liquid crystals (LC’s) in order to control the reflectance electrically. The preparation of PS and the choice of the right group ... [more ▼]

In this paper we demonstrate the filling of porous silicon (PS) layers with liquid crystals (LC’s) in order to control the reflectance electrically. The preparation of PS and the choice of the right group of LC’s will be presented. Especially an oxidation of PS is necessary so that the methods and parameters of oxidation will also be discussed. As a first result the increasing and decreasing of the thickness oscillations in the reflectance as a function of the applied voltage can be observed. [less ▲]

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See detailA Novel InAlAs/InGaAs Layer Structure for Monolithically Integrated Photoreceiver,
Hodel, U.; Orzati, A.; Marso, Michel UL et al

in Proc. 2000 Int. Conf. Indium Phosphide and Related Materials (2000)

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See detailIntegrated photometer with porous silicon interference filters
Hunkel, D.; Marso, Michel UL; Butz, R. et al

in Materials Science & Engineering : A (2000), B69-70((2000)), 100-103

Porous silicon transmission interference filters with laterally varying transmission wavelengths are used to manufacture a photometer. Because of the linear varying transmission characteristic of the ... [more ▼]

Porous silicon transmission interference filters with laterally varying transmission wavelengths are used to manufacture a photometer. Because of the linear varying transmission characteristic of the filter it is possible to measure, beyond small regions of the porous layer, the correlated spectral photo current. It is therefore necessary to bring up a series of ohmic metal contacts along the porous filter. Between two neighbouring contacts one can measure the spectral photo current of the transmission wavelength at this specific point of the surface. By measuring multiple pairs of contacts, the whole spectrum between 400 and 1100 nm wavelength can be recorded. First results of the resolution capability and sensitivity are demonstrated. [less ▲]

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See detailVertical Silicon MOSFETs based on Selective Epitaxial Growth
Moers, J.; Tönnesmann, A.; Klaes, D. et al

in Proc. 3rd International EuroConference on Advanced Semiconductor Devices and Microsystems (2000)

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See detailFormation of laterally displaced porous silicon filters using different fabrication methods
Marso, Michel UL; Wolter, M.; Arens-Fischer, R. et al

in Proceedings of the 3rd International EuroConference on Advanced Semiconductor Devices and Microsystems (2000)

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See detailVertical p-MOSFETs with gate oxide deposition before selective epitaxial growth
Moers, J.; Klaes, D.; Tönnesmann, A. et al

in Solid-State Electronics (1999), 43(1999), 529-535

A novel vertical MOSFET concept using selective epitaxial growth by low pressure chemical vapor deposition is proposed and the ®rst p-channel device characteristics measured are described. In contrast to ... [more ▼]

A novel vertical MOSFET concept using selective epitaxial growth by low pressure chemical vapor deposition is proposed and the ®rst p-channel device characteristics measured are described. In contrast to other MOS technologies, the gate oxide is deposited before epitaxy, and therefore it exists before the channel region is grown. Compared to planar layouts, the vertical layout increases the packing density without the use of advanced lithography; the extent of the increase depends on application. Compared to other vertical transistors, this concept reduces overlap capacitance and o ers the possibility of three-dimensional integration. Vertical p channel MOSFETs with a channel length LG down to 130 nm and a gate oxide thickness dox down to 12 nm have been fabricated and yield a transconductance of 100 mS mm-1. [less ▲]

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See detail19 GHz vertical Si p-channel MOSFET
Moers, J.; Klaes, D.; Tönnesmann, A. et al

in Electronics Letters (1999), 35(1999), 239-240

Vertical Si p-MOSFETs with channel lengths of 100nm were fabricated using selective low pressure chemical vapour deposition (LPCVD) epitaxial growth and conventional i-line lithography. The layout, called ... [more ▼]

Vertical Si p-MOSFETs with channel lengths of 100nm were fabricated using selective low pressure chemical vapour deposition (LPCVD) epitaxial growth and conventional i-line lithography. The layout, called VOXFET, reduces gate to source/drain overlap capacitances, thus improving high speed applications. Transistors with a gate width of 12 um and gate oxide thickness of 10nm show transconductances gM of 200mS/mm and measured cutoff frequencies of fT = 8.7GHz and fMAX = 19.2 GHz. [less ▲]

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See detailCoupling of insect antennae to field-effect transistors for biochemical sensing
Schroth, P.; Schöning, M. J.; Schütz, S. et al

in Electrochimica Acta (1999), 44(1999), 3821-3826

A bioelectronic interface based on the coupling of an intact insect antenna to a field-e effct transistor (FET) has been realised in a whole-beetle BioFET (Biologically sensitive FET) and an isolated ... [more ▼]

A bioelectronic interface based on the coupling of an intact insect antenna to a field-e effct transistor (FET) has been realised in a whole-beetle BioFET (Biologically sensitive FET) and an isolated-antenna BioFET configuration. The intrinsic BioFET characteristics, such as current-voltage curves, transconductance and signal-to-noise ratio clearly depend on the chip layout. Therefore, the experiments were performed with three di erent gate geometries: linear shape (5 um x 100 um), U shape (5 um x 1000 um) and meander shape (10 um x 6000 um). The BioFET allows the determination of the `green-leaf odour' Z-3-hexen-l-ol down to the low ppb concentration range. Thus, the detection of plant damages is possible with this novel kind of biosensor. [less ▲]

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See detailInterference filters from porous silicon with laterally varying wavelength of reflection
Hunkel, D.; Butz, R.; Arens-Fischer, R. et al

in Journal of Luminescence (1999), 80(1999), 133-136

Porous silicon reflection interference filters of Bragg type consists of up to 40 quarter wave layers with alternating high- and low-refraction index. The refraction index depends on the porosity of the ... [more ▼]

Porous silicon reflection interference filters of Bragg type consists of up to 40 quarter wave layers with alternating high- and low-refraction index. The refraction index depends on the porosity of the silicon. The reflection wavelength can vary over a wide range and depends on the thickness and refraction index of the porous layers. A laterally continuously varying wavelength with linear profile of the filter can be achieved by manipulating the porosity and thickness of the silicon in the lateral direction. Our approach is to vary the Fermi level laterally by applying a potential parallel to the surface of the wafer. The slope of the Fermi level is easily controlled by the magnitude of the potential. The lateral current density and thus the porosity and thickness is related to the potential difference between the laterally varying Fermi level and the potential induced by the counter electrode. This relation is the well-known current-voltage characteristic of a Silicon hydrofluoric acid contact. The linearity of the etch profile across the wafer is demonstrated and the properties of preliminary reflection filters are shown. [less ▲]

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See detailSelectively Grown Vertical Si MOS Transistor with Reduced Overlap Capacitances
Klaes, D.; Moers, J.; Tönnesmann, A. et al

in Thin Solid Films (1998), 336(1998), 306-308

Vertical p-MOS transistors with channel length of 130 nm have been fabricated using selective epitaxial growth (SEG) to define the channel region. The vertical layout offers the advantages of achieving ... [more ▼]

Vertical p-MOS transistors with channel length of 130 nm have been fabricated using selective epitaxial growth (SEG) to define the channel region. The vertical layout offers the advantages of achieving short channel lengths and high integration densities while still using optical lithography to define lateral dimensions. Compared to other vertical concepts, this layout has reduced gate to source/drain overlap capacitances which is necessary for high speed applications. The use of SEG instead of blanket epitaxy avoids the deterioration of the Si/SiO2 interface due to reactive ion etching (RIE) and reduces punch-through due to facet growth. First non-optimized p-channel MOSFETs with a 12-nm gate oxide show a transconductance of 90 mS/mm. The cut-off frequencies of this device turned out to be f T = 2.3 GHz and f max = 1.1 GHz. [less ▲]

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See detailPIN-PJBT Integration: A New GaAs Based Optoelectronic Receiver,
Dillmann, F.; Marso, Michel UL; Hardtdegen, H. et al

in Proceedings of the 28th European Solid State Devices Research Conference, Bordeaux, France, (1998)

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See detailSelectively Grown Vertical Si p-MOS Transistor with Reduced Overlap Capacitances
Klaes, D.; Moers, J.; Tönnesmann, A. et al

in Proceedings of the 28th European Solid State Devices Research Conference, Bordeaux, France (1998)

Detailed reference viewed: 13 (0 UL)